This invention relates to an electrophoretic display apparatus in general and more particularly to an electrophoretic display apparatus having a dual anode structure.
The electrophoretic display (EPID) is well known and there exists many patents and articles in the prior art which describe the construction, structure as well as describing the operation of such displays. The following patents are illustrative of prior art devices and approaches. These patents issued to Frnak J. Disanto and Denis A. Krusos, the inventors herein, and are assigned to Copytele, Inc., the assignee herein.
See for example, U.S. Pat. No. 4,655,897 issued on Apr. 7, 1987 entitled ELECTROPHORETIC DISPLAY PANELS AND ASSOCIATED METHODS.
This patent describes a typical electrophoretic display apparatus utilizing an XY matrix consisting of grid and cathode lines which are insulated one from the other and which are associated with an anode electrode and having the space between the grid and cathode lines and the anode electrode filled with an electrophoretic dispersion. The patent describes techniques for making such displays as well as suitable dispersions for use with such displays.
U.S. Pat. No. 4,732,830 issued on Mar. 22, 1988 entitled ELECTROPHORETIC DISPLAY PANELS AND ASSOCIATED METHODS. This patent describes methods for making electrophoretic displays as well as describing display construction and operation.
U.S. Pat. No. 4,742,345 entitled ELECTROPHORETIC DISPLAY PANEL APPARATUS AND METHODS THEREFOR issued on May 3, 1988. This patent describes improved electrophoretic display panels exhibiting improved alignment and contrast with cicuitry for implementing the same as well as methods for providing such a panel.
U.S. Pat. No. 4,746917 issued on May 24, 1988 entitled METHOD AND APPARATUS FOR OPERATING ELECTROPHORETIC DISPLAYS BETWEEN A DISPLAY AND A NON-DISPLAY MODE. This patent describes various biasing techniques for operating electrophoretic displays to provide writing, erasing as well as operating the display during a display and non-display mode.
U.S. Pat. No. 4,772,820 issued on Sept. 20, 1988 entitled MONOLITHIC FLAT PANEL DISPLAY APPARATUS. This patent describes methods and apparatus for fabricating flat panel displays employing electrophoretic principles to enable such displays to be biased and driven by additional circuitry.
As one will understand, by reviewing the above-noted patents, as well as additional subject matter, an important object of the prior art is to provide an improved display with increased contrast, faster operating time, and more reliable performance. A particularly disturbing problem which occurs in electrophoretic displays results in the appearance of a bright "flash" while occurring over a relatively short period is perfectly visible. The "flash" appears disturbing to many individuals who view the display and is caused by the following phenomenon. For proper operation of the electrophoretic display, the amount of pigment in the suspension is considerably greater than the pigment required to give a suitable background when the panel is in a HOLD condition. The term HOLD is known in the art, and essentially the electrophoretic panel is placed in a HOLD condition prior to writing the display. In this manner the HOLD condition is achieved when the anode is at a high positive voltage, the grid is at a low voltage, and the cathode is at a high voltage.
Typically, the anode would be at a voltage for example of 200 volts with the grid at a lower voltage as for example -12 volts with the cathode at a high voltage which would be +15 volts. With these voltages on the typical prior art electrophoretic display, the display is in the so-called HOLD condition. This HOLD condition is implemented prior to the writing mode during which mode new information is written into the display. The excess pigment during the HOLD condition is at the surface of the anode which is at the highest potential with respect to any other of the electrodes. To ERASE the display, the anode is made negative and all the pigment leaves the anode and is at the surface of the grid and cathode. During ERASE, the anode, for example, would be placed at --200 volts. Hence during the ERASE mode, all the pigment leaves the anode and is now at the surface of the grid and cathode accordingly. The cathode side of the flat display during the ERASE mode is considerably brighter than it is during the HOLD causing a bright "flash" to appear on the display even when the ERASE time is extremely short.
The "flash" occurs between frames and may repeat every 20 to 30 milliseconds caused by the change in brightness between the HOLD and the ERASE mode. It is, of course, desirable to eliminate this bright "flash" so that the display appears more uniform and stable.
It is a further object to increase the speed of the flat panel display while further reducing the anode voltage required during the WRITE and HOLD cycles.